On-chip power proxy based architecture
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United States of America Patent
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Sep 18, 2012
Grant Date -
Oct 21, 2010
app pub date -
Apr 15, 2009
filing date -
Apr 15, 2009
priority date (Note) -
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Abstract
Illustrative embodiments estimate power consumption within a multi-core microprocessor chip. An authorized user selects a set of activities to be monitored. A value for each activity of the set of activities is stored in a separate counter of a set of counters, forming a set of stored values. The value comprises the count multiplied by a weight factor specific to the activity. The set of activities are grouped into subsets. The stored values corresponding to each activity in each subset are summed, forming a total value for each subset. The total value of each subset is multiplied by a factor corresponding to the subset, forming a scaled value for each subset. The scaled value of each subset is summed, forming a power usage value. A power manager adjusts the operational parameters of the unit based on a comparison of the power usage value to a threshold value.
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