Multi-format multiplier unit
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United States of America Patent
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Sep 25, 2012
Grant Date -
Aug 14, 2008
app pub date -
Jan 10, 2008
filing date -
Jan 10, 2007
priority date (Note) -
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Abstract
Multiplication engines and multiplication methods are provided. A multiplication engine for a digital processor includes a first multiplier to generate unequally weighted partial products from input operands in a first multiplier mode; a second multiplier to generate equally weighted partial products from input operands in a second multiplier mode; a multiplexer to select the unequally weighted partial products in the first multiplier mode and to select the equally weighted partial products in the second multiplier mode; and a carry save adder array configured to combine the selected partial products in the first multiplier mode and in the second multiplier mode.
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