Multi-die integrated circuit device and method
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United States of America Patent
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Oct 9, 2012
Grant Date -
Dec 31, 2009
app pub date -
Jun 30, 2008
filing date -
Jun 30, 2008
priority date (Note) -
In Force
status (Latency Note)
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Abstract
In some embodiments, provided is an integrated circuit with a first die coupled to a second die. The second die has through-silicon vias disposed through it to provide power references to the first die. The through-silicon vias are laterally re-positionable without inhibiting circuit sections in the second die.
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