Region coherence array having hint bits for a clustered shared-memory multiprocessor system
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United States of America Patent
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Oct 9, 2012
Grant Date -
Jul 29, 2010
app pub date -
Jan 27, 2009
filing date -
Jan 27, 2009
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Abstract
A system and method for a multilevel region coherence protocol for use in Region Coherence Arrays (RCAs) deployed in clustered shared-memory multiprocessor systems which optimize cache-to-cache transfers (interventions) by using region hint bits in each RCA to allow memory requests for lines of a region of the memory to be optimally sent to only a determined portion of the clustered shared-memory multiprocessor system without broadcasting the requests to all processors in the system. A sufficient number of region hint bits are used to uniquely identify each level of the system's interconnect hierarchy to optimally predict which level of the system likely includes a processor that has cached copies of lines of data from the region.
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