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United States of America Patent

PATENT NO 8289727
APP PUB NO 20110304998A1
SERIAL NO

12814102

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In accordance with an embodiment, a substrate layout comprises a ground plane of a first power loop on a layer of a substrate, a first trace rail on the layer extending along a first periphery of the ground plane, and a first perpendicular trace coupled to the first trace rail. The ground plane is between the first trace rail and a die area, and the first perpendicular trace extends perpendicularly from the first trace rail. The first trace rail and the first perpendicular trace are components of a second power loop.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU
GLOBAL UNICHIP CORPNO 10 LI-HSIN 6TH ROAD HSINCHU SCIENCE PARK HSINCHU CITY 30078

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Chin-Sung Banqiao, TW 16 69
Lin, Li-Hua Kaohsiung, TW 14 51
Lin, Yu-Yu Wujie Township, TW 87 494

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