Method for fabrication of a semiconductor device and structure

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United States of America Patent

PATENT NO 8294159
APP PUB NO 20110233676A1
SERIAL NO

13073268

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Abstract

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A method for fabrication of 3D semiconductor devices utilizing a layer transfer and steps for forming transistors on top of a pre-fabricated semiconductor device comprising transistors formed on crystallized semiconductor base layer and metal layer for the transistors interconnections and insulation layer. The advantage of this approach is reduction of the over all metal length used to interconnect the various transistors.

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Patent Owner(s)

  • MONOLITHIC 3D INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beinglass, Israel Sunnyvale, US 60 2993
Cronquist, Brian San Jose, US 284 3809
de, Jong Jan Lodewijk Cupertino, US 21 677
Or-Bach, Zvi San Jose, US 534 17764
Sekar, Deepak C San Jose, US 220 3440

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