Cryptographic bus architecture for the prevention of differential power analysis

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United States of America Patent

PATENT NO 8296577
APP PUB NO 20050273630A1
SERIAL NO

10864556

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Abstract

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An apparatus and method for preventing information leakage attacks through a polarized cryptographic bus architecture. The polarized cryptographic bus architecture randomly changes the polarity of the target bit such that the leaked information cannot be consistently averaged to yield statistical key material. Further, to increase the prevention of information leakage attacks, a set of dual rails is used to write data to a given register bit.

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Patent Owner(s)

  • HRL LABORATORIES, LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chow, Lap-Wai South Pasadena, US 43 1280
Clark,, Jr William M Camarillo, US 13 39
Shu, David B West Hills, US 16 508

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