Test circuit for input/output array and method and storage device thereof
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United States of America Patent
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Oct 23, 2012
Grant Date -
Sep 29, 2011
app pub date -
Mar 29, 2010
filing date -
Mar 29, 2010
priority date (Note) -
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Abstract
The invention provides a test circuit for n input/output arrays. Each of the n input/output arrays has M pairs of input/output. The test circuit includes M write drivers and M comparing circuits. The ith write driver provides an ith test signal to the ith inputs of all of the n input/output arrays, and 1≦i≦M. The jth comparing circuit determines if jth output signals of all of the n input/output arrays are the same, and outputs a jth comparing result correspondingly, and 1≦j≦M. The invention also provides a method of testing n input/output arrays. The invention also provides a storage device.
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