Direct memory access for advanced high speed bus
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United States of America Patent
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Oct 30, 2012
Grant Date -
Oct 22, 2009
app pub date -
Jun 12, 2009
filing date -
Mar 31, 2005
priority date (Note) -
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Abstract
A memory system for use with a master-slave type bus such as an AHB bus has a memory, a bus interface to allow memory access from the bus, and a direct memory access interface to allow memory access from a DMA controller without occupying the bus. The system can reduce occupancy of the bus, it can allow dedicated DMA access protocols faster than the bus protocol to be used, and can remove or reduce the need for bus arbitration and associated circuitry and delays. An arbiter can arbitrate between the memory accesses and give priority to DMA accesses.
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