Super high-density module with integrated wafer level packages

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8304894
APP PUB NO 20070145558A1
SERIAL NO

11712152

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A wafer level package, and a semiconductor wafer, electronic system, and a memory module that include one or more of the wafer level packages, and methods of fabricating the die packages on a wafer level, and integrated circuit modules that include one or more die packages are provided. In one embodiment, the die package comprises a redistribution layer interconnecting two or more dies disposed on a substrate, typically a semiconductor wafer, the redistribution layer including a first trace connecting a bond pad of each of two dies, and a second trace connecting one of the bond pads of the two dies to a ball pad. The die package of the invention can comprise memory devices such as static random access memories (SRAMs), and can be incorporated into a variety of electronic systems as part of memory packages such as single in-line memory modules (SIMMs) or dual in-line memory modules.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Boon, Suan Jeung Singapore, SG 58 1447
Chia, Yong Poo Singapore, SG 63 1318
Low, Siu Waf Singapore, SG 30 1223
Neo, Yong Loo Singapore, SG 23 611
Ser, Bok Leng Singapore, SG 9 217

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