Resistive voltage-down regulator for integrated circuit receivers
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United States of America Patent
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Nov 20, 2012
Grant Date -
Nov 3, 2005
app pub date -
Apr 30, 2004
filing date -
Apr 30, 2004
priority date (Note) -
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Abstract
A receiver circuit is provided on an integrated circuit. The receiver circuit includes first and second power supply terminals, a ground supply terminal, a resistive element coupled between the first and second power supply terminals, and a receiver biased between the second power supply terminal and the ground supply terminal. The receiver draws a bias current through the resistive element, which varies as a positive function with a voltage on the second power supply terminal. The voltage on the second power supply terminal varies as an inverse function of the bias current.
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