Circuit-on-foil process for manufacturing a laminated semiconductor package substrate having embedded conductive patterns
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Dec 4, 2012
Grant Date -
N/A
app pub date -
Nov 1, 2007
filing date -
May 1, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method of making a substrate for a semiconductor package includes providing a laminated layer structure including a backing layer and a metal layer attached to the backing layer. A circuit layer is plated atop a first surface of the metal layer to form a circuit-on-metal structure. The circuit-on-metal structure is coupled to a dielectric layer by causing the dielectric layer to flow around the circuit layer to the first surface of the metal layer so that the circuit layer is embedded within the dielectric layer and the first surface of the metal layer is in direct contact with a first surface of the dielectric layer. The backing layer is then removed completely. The metal layer is then removed completely.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully