Systems and methods for reduced format data processing
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United States of America Patent
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Dec 4, 2012
Grant Date -
Jul 19, 2012
app pub date -
Jan 19, 2011
filing date -
Jan 19, 2011
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Abstract
Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include a variable gain amplifier circuit, an analog to digital conversion circuit, a cosine component calculation circuit, a sine calculation circuit, and a zero gain start calculation circuit. The variable gain amplifier circuit is operable to apply a gain to a data input corresponding to a gain feedback value and providing an amplified output. The analog to digital conversion circuit is operable to convert the amplified output to a corresponding series of digital samples. The cosine component calculation circuit is operable to calculate a cosine component from the series of digital samples, and the sine component calculation circuit operable to calculate a sine component from the series of digital samples. The zero gain start calculation circuit is operable to calculate a raw gain error value based on the cosine component and the sine component, where the gain feedback value is derived from the raw gain error value.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| BROADCOM INTERNATIONAL PTE LTD | SINGAPORE |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Annampedu, Viswanath | Schnecksville, US | 53 | 1403 |
| Grundvig, Jeffrey | Loveland, US | 8 | 195 |
| Zhang, Xun | Westford, US | 169 | 736 |
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| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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