Semiconductor device and information processing system including the same
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United States of America Patent
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Dec 11, 2012
Grant Date -
Apr 14, 2011
app pub date -
Oct 6, 2010
filing date -
Oct 9, 2009
priority date (Note) -
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Abstract
A semiconductor device includes plural core chips and an interface chip that controls the plural core chips. Each of the plural core chips includes a layer address generating circuit that generates a second chip address by incrementing a value of a first chip address and a layer address comparing circuit that compares a third chip address supplied from the interface chip and the second chip address, and activates a chip selection signal when the third chip address and the second chip address are matched with each other. When a non-used chip signal is in an inactivated state, the layer address generating circuit supplies the second chip address to another core chip, and when the non-used chip signal is in an activated state, the layer address generating circuit supplies the first chip address to another core chip without a change.
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