Method for selecting natural frequency in resonant clock distribution networks with no inductor overhead

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United States of America Patent

PATENT NO 8339209
APP PUB NO 20110084772A1
SERIAL NO

12903163

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Abstract

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An inductor architecture for resonant clock distribution networks is described. This architecture allows for the adjustment of the natural frequency of a resonant clock distribution network, so that it achieves energy-efficient operation at multiple clock frequencies. The proposed architecture exhibits no inductor overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels.

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Patent Owner(s)

Patent OwnerAddress
CYCLOS SEMICONDUCTOR INC1995 UNIVERSITY AVENUE SUITE 375 BERKELEY CA 94709

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishii, Alexander Princeton, US 15 512
Papaefthymiou, Marios C Ann Arbor, US 23 868

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