Integrated chip carrier with compliant interconnects
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United States of America Patent
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Jan 1, 2013
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N/A
app pub date -
Jan 7, 2011
filing date -
Aug 11, 2006
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Abstract
A silicon chip includes a silicon substrate, a plurality of pads, and a plurality of through vias to connect back-end-of-line wiring to the plurality of pads. The silicon substrate includes a layer of active devices and the back-end-of-line wiring connected to the active devices.
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