Flipchip bump patterns for efficient I-mesh power distribution schemes
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United States of America Patent
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Jan 8, 2013
Grant Date -
Nov 19, 2009
app pub date -
May 15, 2008
filing date -
May 15, 2008
priority date (Note) -
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status (Latency Note)
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Abstract
Disclosed is a flipchip scheme where power and ground bumps are arranged in a striped configuration. Specifically, there are a plurality of lines of power bumps, and a plurality of lines of ground bumps. Each line of power bumps is interconnected by a mesh core power bus, and each line of ground bumps is interconnected by a mesh core ground bus. The busses are shorted across the bumps without having to use metal tab extensions. This arrangement provides that: signal routing can be provided between the lines of bumps; and/or the mesh core power busses can be provided as being wider in order to provide improved power mesh performance and/or in order to reduce or eliminate the metal required on the second top-most metal layer.
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