Non-volatile memory with redundancy data buffered in remote buffer circuits
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United States of America Patent
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Jan 29, 2013
Grant Date -
Jun 30, 2011
app pub date -
Mar 11, 2011
filing date -
Mar 24, 2006
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Abstract
A memory has defective locations in its user portion replaceable by redundant locations in a redundant portion. Data latches in column circuits of user and redundant portions allow data sensed from or to be written to a memory to be exchanged with a data bus. A remote redundancy scheme has the redundant data available from a central buffer accessible by any number of column circuits. Redundant data buffer circuits enable bus exchange with data from the user data latches except for defective locations when data are taken from the central buffer. In this way only addressing for the user portion is used for bus exchange. Also, accessibility to the redundant data will not be restricted by the locations of the column circuits relative to the redundant data latches and the buffered redundant data can be accessed at a finer granularity than that imposed by the column circuits.
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Patent Owner(s)
- SANDISK TECHNOLOGIES LLC
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Cernea, Raul-Adrian | Santa Clara, US | 131 | 14740 |
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