Data driven logic simulation

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United States of America Patent

PATENT NO 8365111
APP PUB NO 20090222252A1
SERIAL NO

12392666

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Abstract

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An apparatus and method may be used for compiling a hardware logic design into data-driven logic programs to be executed on a data-driven chip. The apparatus may include storage with a library for defining a net-list synthesized by a synthesis tool. The apparatus may also include a data-driven logic verification chip comprising a plurality of logic processors. The apparatus may further include a code generator for adopting heuristics to convert the net-list into data driven logic programs and for allocating hardware resources to balance computing and storage loads across the plurality of logic processors of the verification chip.

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Patent Owner(s)

Patent OwnerAddress
ET INTERNATIONAL INCCASHO MILL PROFESSIONAL CENTER 1501 CASHO MILL ROAD SUITE 4 NEWARK DE 19711

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Fei Austin, US 289 4754
Gao, Guang R Newark, US 13 672

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