Power management with dynamic frequency adjustments

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United States of America Patent

PATENT NO 8370663
APP PUB NO 20090204830A1
SERIAL NO

12029375

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Abstract

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A central processing unit (CPU) can specify an initial (e.g., baseline) frequency for a clock signal used by a device to perform a task. The CPU is then placed in a reduced power mode. The device performs the task after the CPU is placed in the reduced power mode until a triggering event causes the device to send an interrupt to the CPU. In response to the interrupt, the CPU awakens to dynamically adjust the clock frequency. If the clock frequency is reset to the baseline value, then the CPU is again placed in the reduced power mode.

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Patent Owner(s)

  • NVIDIA CORPORATION

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Frid, Aleksandr San Francisco, US 10 844
Sriram, Parthasarathy Los Altos, US 46 1468

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