Method, system, and apparatus for adjusting local and global pattern density of an integrated circuit design
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United States of America Patent
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Feb 12, 2013
Grant Date -
Aug 25, 2011
app pub date -
Feb 25, 2010
filing date -
Feb 25, 2010
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Abstract
An integrated circuit (IC) design method providing a circuit design layout having a plurality of functional blocks disposed a distance away from each other; identifying a local pattern density to an approximate dummy region, on the circuit design layout, within a predefined distance to one of the functional blocks; performing a local dummy insertion to the approximate dummy region according to the local pattern density; repeating the identifying and performing to at least some other of the functional blocks; and implementing a global dummy insertion to a non-local dummy region according to a global pattern density.
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