Detection of broken word-lines in memory arrays
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United States of America Patent
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Feb 19, 2013
Grant Date -
Nov 8, 2012
app pub date -
May 5, 2011
filing date -
May 5, 2011
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Abstract
Techniques and corresponding circuitry are presented for the detection of broken wordlines in a memory array. An “inter-word-line” comparison where the program loop counts of different word-lines are compared in order to determine whether a word-line may be defective. The number of programming pulses needed for the cells along a word-line WLn is compared to the number needed for a preceding word-line, such as WLn or WL(n−1), to see whether it exceeds this earlier value by a threshold value. If the word-line requires an excessive number of pulses, relative the earlier word-line, to complete programming, it is treated as defective.
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