Stacked wafer manufacturing method

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United States of America Patent

PATENT NO 8389386
APP PUB NO 20110256667A1
SERIAL NO

13088591

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Abstract

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A manufacturing method for a stacked wafer configured by bonding a mother wafer having a plurality of first semiconductor device and a stacking wafer having a plurality of second semiconductor devices. The manufacturing method includes the steps of attaching a protective member to the front side of the stacking wafer to protect the second semiconductor devices, next grinding the back side of the stacking wafer, next bonding the front side of a reinforcing wafer through a bonding layer to the back side of the stacking wafer, next dividing the stacking wafer together with the reinforcing wafer into the plural second semiconductor devices, next bonding the front side of each second semiconductor device to the front side of the mother wafer to thereby connect the electrodes of each second semiconductor device to the electrodes of the corresponding first semiconductor device of the mother wafer, and finally grinding the reinforcing wafer bonded to the back side of each second semiconductor device to thereby remove the reinforcing wafer.

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Patent Owner(s)

Patent OwnerAddress
DISCO CORPORATION13-11 OMORI-KITA 2-CHOME OTA-KU TOKYO 143-8580

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kawai, Akihito Ota-Ku, JP 22 192
Kondo, Koichi Ota-ku, JP 106 914

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