Ensuring minimum gate speed during startup of gate speed regulator

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8390367
SERIAL NO

13027504

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A computing device is disclosed comprising digital circuitry, and a gate speed regulator operable to generate a supply voltage applied to the digital circuitry. A frequency synthesizer generates a first reference frequency, and a propagation delay oscillator generates a first oscillation frequency in response to the supply voltage, wherein the first oscillation frequency is compared to the first reference frequency to generate a first error signal. A reference oscillator generates a second reference frequency in response to a reference voltage, and a startup oscillator generates a second oscillation frequency in response to the supply voltage, wherein the second oscillation frequency is compared to the second reference frequency to generate a second error signal. An adjustable circuit, responsive to the first and second error signals, adjusts the supply voltage applied to the digital circuitry.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
WESTERN DIGITAL TECHNOLOGIES INC3355 MICHELSON DRIVE SUITE 100 IRVINE CA 92612

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bennett, George J Murrieta, US 54 5722

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation