PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BOND VIAS

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United States of America Patent

SERIAL NO

13404458

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Abstract

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A microelectronic package can include wire bonds having bases bonded to respective ones of conductive elements exposed at a surface of a substrate. The wire bonds may have exterior edge surfaces disposed at an angle between 25° and 92° relative to the bases, and ends remote, e.g., opposite, from the bases, and remote from the ends which are connected to the bases. A dielectric encapsulation layer extends from the substrate and covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer, the unencapsulated portions including the ends of the wire bonds.

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Patent Owner(s)

Patent OwnerAddress
ADEIA SEMICONDUCTOR TECHNOLOGIES LLC3025 ORCHARD PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Alatorre, Roseann San Martin, US 14 535
Chau, Ellis San Jose, US 45 2407
Co, Reynaldo Santa Cruz, US 37 1300
Damberg, Philip Cupertino, US 53 1335
Wang, Wei-Shun Palo Alto, US 29 931
Yang, Se Young Cupertino, US 20 717

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