Semiconductor device having a grain orientation layer
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United States of America Patent
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Mar 26, 2013
Grant Date -
Feb 5, 2009
app pub date -
Feb 22, 2008
filing date -
Jul 31, 2007
priority date (Note) -
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Abstract
A manufacturing process of a semiconductor device includes generating a less random grain orientation distribution in metal features of a semiconductor device by employing a grain orientation layer. The less random grain orientation, e.g., a grain orientation distribution which has a higher percentage of grains that have a predetermined grain orientation, may lead to improved reliability of the metal features. The grain orientation layer may be deposited on the metal features wherein the desired grain structure of the metal features may be obtained by a subsequent annealing process, during which the metal feature is in contact with the grain orientation layer.
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