Semiconductor with through-substrate interconnect
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United States of America Patent
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Mar 26, 2013
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app pub date -
Jun 14, 2011
filing date -
Jun 19, 2008
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Abstract
Semiconductor devices are described that have a metal interconnect extending vertically through a portion of the device to the back side of a semiconductor substrate. A top region of the metal interconnect is located vertically below a horizontal plane containing a metal routing layer. Method of fabricating the semiconductor device can include etching a via into a semiconductor substrate, filling the via with a metal material, forming a metal routing layer subsequent to filling the via, and removing a portion of a bottom of the semiconductor substrate to expose a bottom region of the metal filled via.
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