Method for packing semiconductor components and product produced according to the method
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United States of America Patent
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Apr 16, 2013
Grant Date -
Nov 11, 2010
app pub date -
Jun 4, 2008
filing date -
Jun 29, 2007
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method for packing semiconductor components is provided, in which a first side of a first wafer is connected to at least one further wafer, wherein at least one of the wafers has a plurality a semiconductor circuits and wherein trenches are made in the second side of the first wafer opposite to the first side and divide the first wafer into a plurality of parts, which are separated from one another by the trenches, but are connected mechanically to one another by means of the at least one further wafer, and wherein the connecting region between the first wafer and the at least one further wafer has been or will be laterally exposed in the trenches. A coating that covers the connecting region is then applied to the regions of the trenches in which the connecting region is exposed.
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