Composite layered chip package
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United States of America Patent
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Apr 23, 2013
Grant Date -
Mar 28, 2013
app pub date -
Sep 22, 2011
filing date -
Sep 22, 2011
priority date (Note) -
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Abstract
A composite layered chip package includes first and second subpackages that are stacked. Each subpackage includes a main body and wiring. The main body includes: a main part having a top surface and a bottom surface; first terminals disposed on the top surface of the main part; and second terminals disposed on the bottom surface of the main part. The first and second terminals are electrically connected to the wiring. The first and second subpackages are arranged in a specific relative positional relationship, different from a reference relative positional relationship, with each other.
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