Phase interpolator and semiconductor circuit device

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United States of America Patent

PATENT NO 8427208
APP PUB NO 20120139591A1
SERIAL NO

13369847

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Abstract

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A first mixer generates a first and a second clock signal having a phase opposite to that of the first clock signal. A second mixer generates a third clock signal having a phase lead angle of 90 degrees with respect to the first clock signal and a fourth clock signal having a phase opposite to that of the third clock signal. An ADC generates a digital signal from a signal that is generated on the basis of a composite signal of a voltage signal formed on the basis of the exclusive OR of the first and the third clock signal and a voltage signal formed on the basis of the exclusive OR of the second and the fourth clock signal. An adder adds the digital signal to the first control signal to generate the second control signal and supplies the second control signal to the second mixer.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU LIMITEDKAWASAKI-SHI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ozeki, Yoshitomo Kawasaki, JP 5 24

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