Distributed home-node hub
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United States of America Patent
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Apr 23, 2013
Grant Date -
Nov 26, 2009
app pub date -
May 20, 2008
filing date -
May 20, 2008
priority date (Note) -
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Abstract
A method and a system for processor nodes configurable to operate in various distributed shared memory topologies. The processor node may be coupled to a first local memory. The first processor node may include a first local arbiter, which may be configured to perform one or more of a memory node decode or a coherency check on the first local memory. The processor node may also include a switch coupled to the first local arbiter for enabling and/or disabling the first local arbiter. Thus one or more processor nodes may be coupled together in various distributed shared memory configurations, depending on the configuration of their respective switches.
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