Disabling redundant subfunctional units receiving same input value and outputting same output value for the disabled units in SIMD processor
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United States of America Patent
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Apr 23, 2013
Grant Date -
Feb 24, 2011
app pub date -
Mar 12, 2010
filing date -
Aug 18, 2009
priority date (Note) -
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status (Latency Note)
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Abstract
A processor includes a plurality of subfunctional units provided corresponding to respective slots of one or more pieces of operation result data including a plurality of slots for an SIMD operation; and an enable generating unit configured to, in each of the one or more pieces of the operation result data, compare a value of a predetermined slot with a value of a slot other than the predetermined slot, and disable one or more subfunctional units to which the value equal to the value of the predetermined slot is inputted, and the processor outputs the value of the predetermined slot as the value of the one or more subfunctional units which have been disabled.
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