Dynamic tag allocation in a multithreaded out-of-order processor
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United States of America Patent
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Apr 23, 2013
Grant Date -
Dec 30, 2010
app pub date -
Jun 30, 2009
filing date -
Jun 30, 2009
priority date (Note) -
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Abstract
Various techniques for dynamically allocating instruction tags and using those tags are disclosed. These techniques may apply to processors supporting out-of-order execution and to architectures that supports multiple threads. A group of instructions may be assigned a tag value from a pool of available tag values. A tag value may be usable to determine the program order of a group of instructions relative to other instructions in a thread. After the group of instructions has been (or is about to be) committed, the tag value may be freed so that it can be re-used on a second group of instructions. Tag values are dynamically allocated between threads; accordingly, a particular tag value or range of tag values is not dedicated to a particular thread.
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