Error protection method, TDC module, CTDC module, all-digital phase-locked loop, and calibration method thereof
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 23, 2013
Grant Date -
Apr 28, 2011
app pub date -
Dec 31, 2010
filing date -
Oct 16, 2007
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An error protection method for a time-to-digital converter (TDC) decoder of an all-digital phase-locked loop (ADPLL) includes: retrieving a digital code received by the TDC decoder; retrieving a cycle code received by the TDC decoder; performing an exclusive-or operation on a first predetermined bit of the digital code and a second predetermined bit of the cycle code for generating an error protection code; and using the error protection code to fix errors within the cycle code by adding the error protection code into the cycle code and shifting the cycle code by a third predetermined number of bits.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully