Semiconductor memory device and error correcting method
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United States of America Patent
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Apr 23, 2013
Grant Date -
Dec 24, 2009
app pub date -
Jan 27, 2009
filing date -
Jun 19, 2008
priority date (Note) -
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Abstract
A decoding unit is arranged between a reading unit that reads data with an error correction code added from memory cells on a specific one of the first data lines and an output unit that selectively outputs certain data of the read out data. The decoding unit corrects any errors in the data read out by the reading unit in accordance with the error correction code. The data in which the errors are corrected by the decoding unit is written back in the memory cells on the specific first data line.
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