Random access memory device utilizing a vertically oriented select transistor
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United States of America Patent
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Apr 30, 2013
Grant Date -
Nov 4, 2010
app pub date -
Jul 12, 2010
filing date -
Aug 29, 2002
priority date (Note) -
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Abstract
A memory structure has a vertically oriented access transistor with an annular gate region. A transistor is fabricated such that the channel of the transistor extends outward with respect to the surface of the substrate. An annular gate is fabricated around the vertical channel such that it partially or completely surrounds the channel. A buried annular bitline may also be implemented. After the vertically oriented transistor is fabricated with the annular gate, a storage device may be fabricated over the transistor to provide a memory cell.
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