Digital frequency divider
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United States of America Patent
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Apr 30, 2013
Grant Date -
Mar 21, 2013
app pub date -
Nov 13, 2012
filing date -
Oct 29, 2010
priority date (Note) -
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Abstract
Various embodiments of the present invention relate to systems, devices and method of frequency synthesis that generate in-phase and quadrature-phase clock signals at a programmable frequency. The generated frequency, which can range from a fraction to multiples of the input reference frequency, is generated by dividers following a phase-locked loop, thus avoiding the use of a low input reference frequency as well as frequency doubling.
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