Programmable logic switch
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United States of America Patent
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Apr 30, 2013
Grant Date -
N/A
app pub date -
May 31, 2012
filing date -
Feb 13, 2012
priority date (Note) -
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Abstract
One embodiment provides a programmable logic switch in which a first nonvolatile memory and a second nonvolatile memory are formed in the same well, and in which to change the first nonvolatile memory from an erased state to a written state and leave the second nonvolatile memory being in the erased state, a first write voltage is applied to a first line connected with gate electrodes of the first and second nonvolatile memories, a second write voltage is applied to a second line connected to a source in the first nonvolatile memory, and a third write voltage lower than the second write voltage is applied to a fourth line connected to a source of the second nonvolatile memory.
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