Fractional digital PLL with analog phase error compensator
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United States of America Patent
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Apr 30, 2013
Grant Date -
Jun 28, 2012
app pub date -
Dec 2, 2011
filing date -
Dec 23, 2010
priority date (Note) -
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Abstract
Disclosed is a fractional digital phase locked loop with an analog phase error compensator. The digital phase locked loop with an analog phase error compensator can reduce excessive power consumption and power noise and transient current noise while increasing phase error detection resolution by performing fractional phase error detection and compensation through the analog phase error compensator.
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