Nonvolatile semiconductor memory device and method testing the same

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United States of America Patent

PATENT NO 8432737
APP PUB NO 20120051134A1
SERIAL NO

13217512

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Abstract

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When performing a word line leak test to determine a leak state of the word lines, the control circuit applies, from the voltage control circuit to the word lines connected to the memory cell array written with test pattern data, voltages corresponding to the test pattern data. Thereafter, it switches the transfer transistors to a nonconductive state, thereby setting the word lines in a floating state. After a lapse of a certain time from switching of the transfer transistors to a nonconductive state, it activates the sense amplifier circuit to perform a read operation in the memory cell array. Then it compares a result of the read operation with an expectation value corresponding to the test pattern data.

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Patent Owner(s)

Patent OwnerAddress
KIOXIA CORPORATIONTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shiga, Hitoshi Yokohama, JP 61 741

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