System to determine fault tolerance in an integrated circuit and associated methods
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United States of America Patent
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Apr 30, 2013
Grant Date -
Sep 23, 2010
app pub date -
Mar 17, 2009
filing date -
Mar 17, 2009
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A system to determine fault tolerance in an integrated circuit may include a programmable logic device carried by the integrated circuit. The system may also include a configurable memory carried by the programmable logic device to control the function and/or connection of a portion of the programmable logic device. The system may further include user logic carried by said programmable logic device and in communication with a user and/or the configurable memory. The user logic may identify corrupted data in the configurable memory based upon changing user requirements.
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