Cyclic redundancy check code generating circuit and cyclic redundancy check code generating method
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United States of America Patent
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Apr 30, 2013
Grant Date -
Jun 23, 2011
app pub date -
Dec 16, 2010
filing date -
Dec 21, 2009
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A cyclic redundancy check code generating circuit successively receives one or more parallel data as input, and repetitively performs a prescribed operation for calculating a cyclic redundancy check code for each parallel data, based on the parallel data and on an initial value or an earlier calculated cyclic redundancy check code. The cyclic redundancy check code generating circuit includes: a plurality of sub-operation units which, based on the initial value and the parallel data, perform sub-operations in different pipeline stages, respectively, by dividing the prescribed operation in a bit length direction of the parallel data; and a correction unit which, based on the initial value and the earlier calculated cyclic redundancy check code, corrects the cyclic redundancy check code calculated by the sub-operation units.
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