Register allocation with SIMD architecture using write masks

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United States of America Patent

PATENT NO 8434074
APP PUB NO 20110209127A1
SERIAL NO

12711319

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Abstract

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A single instruction multiple data processor may accomplish register allocation by identifying live ranges that have incompatible write masks during compilation. Then, edges are added in an interference graph between live ranges that have incompatible masks so that those live ranges will not be assigned to the same physical register.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA MA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ashbaugh, Ben J Folsom, US 59 637
Janczak, Tomasz Gdansk, PL 38 258

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