Junction field effect transistor with an epitaxially grown gate structure
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United States of America Patent
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May 7, 2013
Grant Date -
Oct 11, 2012
app pub date -
Apr 6, 2011
filing date -
Apr 6, 2011
priority date (Note) -
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Abstract
A method of fabricating a semiconductor device that includes forming a replacement gate structure on a portion of a semiconductor substrate, wherein source regions and drain regions are formed in opposing sides of the replacement gate structure. A dielectric is formed on the semiconductor substrate having an upper surface that is coplanar with an upper surface of the replacement gate structure. The replacement gate structure is removed to provide an opening to an exposed portion of the semiconductor substrate. A functional gate conductor is epitaxially grown within the opening in direct contact with the exposed portion of the semiconductor substrate. The method is applicable to planar metal oxide semiconductor field effect transistors (MOSFETs) and fin field effect transistors (finFETs).
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