Semiconductor devices with raised extensions
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United States of America Patent
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May 7, 2013
Grant Date -
Apr 4, 2013
app pub date -
Oct 3, 2011
filing date -
Oct 3, 2011
priority date (Note) -
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Abstract
Transistor devices and methods of their fabrication are disclosed. In one method, a dummy gate structure is formed on a substrate. Bottom portions of the dummy gate structure are undercut. In addition, stair-shaped, raised source and drain regions are formed on the substrate and within at least one undercut formed by the undercutting. The dummy gate structure is removed and a replacement gate is formed on the substrate.
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