TOP ELECTRODE TEMPLATING FOR DRAM CAPACITOR
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United States of America Patent
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May 7, 2013
Grant Date -
May 16, 2013
app pub date -
Nov 11, 2011
filing date -
Nov 11, 2011
priority date (Note) -
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Abstract
A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high k phase of a subsequently deposited dielectric layer. The high k dielectric layer comprises a doped material that can be crystallized after a subsequent annealing treatment. A metal oxide second electrode layer is formed above the dielectric layer. The metal oxide second electrode layer has a crystal structure that is compatible with the crystal structure of the dielectric layer. Optionally, a second electrode bulk layer is formed above the metal oxide second electrode layer.
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