Process for single and multiple level metal-insulator-metal integration with a single mask
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United States of America Patent
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May 7, 2013
Grant Date -
Jul 19, 2012
app pub date -
Mar 28, 2012
filing date -
Sep 19, 2005
priority date (Note) -
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Abstract
A method of fabricating a MIM capacitor is provided. The method includes providing a substrate including a dielectric layer formed on a first conductive layer and a second conductive layer formed over the dielectric layer, and patterning a mask on the second conductive layer. Exposed portions of the second conductive layer are removed to form an upper plate of a MIM capacitor having edges substantially aligned with respective edges of the mask. The upper plate is undercut so that edges of the upper plate are located under the mask. Exposed portions of the dielectric layer and the first conductive layer are removed using the mask to form a capacitor dielectric layer and a lower plate of the MIM capacitor having edges substantially aligned with respective edges of the mask.
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