Pipeline power gating for gates with multiple destinations

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United States of America Patent

PATENT NO 8436647
APP PUB NO 20130009693A1
SERIAL NO

13335104

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Abstract

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A first and second plurality of gates are coupled respectively between first and second source storage elements and first and second destination storage elements. The first and second plurality of gates are slept to reduce leakage current in the plurality of gates under certain conditions by turning off respective one or more transistors between the first and second plurality of gates and power supplies. A third plurality of gates are maintained in a reduced leakage current state (sleep state) or regular state (wake state) based on conditions associated with the source and destination elements for the first and second plurality of gates.

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Patent Owner(s)

Patent OwnerAddress
ADVANCED MICRO DEVICES INC2485 AUGUSTINE DRIVE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bailey, Daniel W Austin, US 27 241

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