Memory dies, stacked memories, memory devices and methods
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United States of America Patent
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May 7, 2013
Grant Date -
Aug 11, 2011
app pub date -
Feb 11, 2010
filing date -
Feb 11, 2010
priority date (Note) -
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Abstract
Memory die, stacks of memory dies, memory devices and methods, such as those to construct and operate such die, stacks and/or memory devices are provided. One such memory die includes an identification configured to be selectively coupled to an external select connection node depending on how the die is arranged in a stack. The identification circuit can determine an identification of its respective memory die responsive to how, if coupled, the identification circuit is coupled to the external select connection node.
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