Firmware processing for downlink F-DPCH

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8437315
APP PUB NO 20090034502A1
SERIAL NO

11963457

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A downlink channel receiver operable to implement fractional dedicated physical channel (F-DPCH) processing within a Rake receiver structure is provided. The downlink channel receiver includes a receiver, a baseband processing block, a WCDMA processing block, wherein F-DPCH processing is divided between a plurality of hardware processing blocks and a plurality of firmware (FW) processing blocks. The receiver is operable to convert a radio frequency (RF) signal to a baseband signal. The baseband processing block operable to processes and provides the baseband signal to the WCDMA processing block. F-DPCH processing is divided between the plurality of hardware processing blocks and plurality of firmware (FW) processing blocks.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE LTDSINGAPORE SINGAPORE

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Catreux-Erceg, Severine E Cardiff, US 3 18
Chang, Li Fung Holmdel, US 101 1569
Kong, Hongwei Denville, US 120 981
Kostic, Zoran Holmdel, US 37 919
Luo, Wei Marlbor, US 364 3816

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation